The present invention relates to a Rail-to-Rail voltage-to-current conversion circuit, comprising MOSFETs, and in which the linear operating range has been extended to the power source range, and an OTA (Operational Transconductance Amplifier) using the same. More particularly, the present invention relates to a voltage-to-current conversion circuit, in which the transconductance is kept constant by using two MOSFETs of the same polarity, and an OTA using the same.
Recently, it has become important to reduce the voltage of the power source of an analog integrated circuit composed of MOSFETs, from the general requirements of the reduction in power consumption of semiconductor integrated circuits and in withstand voltage of devices.
An analog-to-digital hybrid circuit is an integrated circuit that is expected to be widely used in the future. In a digital circuit, the power consumption is in proportion to the second power of the power source voltage to be supplied to the circuit and, therefore, reduction in power source voltage is an effective approach to reduce the power consumption. As a result, there is a trend that the power source voltage of a digital circuit is lowered year after year. As the power source voltage of a digital circuit is lowered, that of the part of an analog circuit composed of MOSFETs, which is realized on the same chip, is required to be lower. On the other hand, as the signal processing becomes more complicated, the operating speed of an integrated circuit increases, the semiconductor process becomes finer in order to enable a higher speed operation, and as a result, the withstand voltage of a device is lowered. Therefore, the reduction in power source voltage becomes an unavoidable issue in an integrated circuit using a high-speed processor.
Generally, the reduction in power source voltage in an analog integrated circuit causes a problem that the linear range of an input signal is reduced. Various Rail-to-Rail circuits, in which the linear range of input signal has been extended to that of the positive and negative power source voltage, have been proposed as circuit configurations to solve this problem.
Among the fundamental circuit elements in an analog circuit composed of MOSFETs, there are the voltage-to-current conversion circuit that generates an output current in accordance with an input voltage and the OTA (Operational Transconductance Amplifier) using same. FIG. 1 is a diagram that shows circuit symbols of an OTA. An OTA circuit 1 puts out an output current Iout in accordance with the difference between two input voltages Vin1 and Vin2. For the above-mentioned voltage-to-current conversion circuit and OTA, the Rail-to-Rail circuit has been proposed.
FIG. 2 is a diagram that shows the configuration of the Rail-to-Rail OTA circuit, which has been disclosed in M. F. Li, U. Dasgupta, X. W. Zhang, Y. C. Lim, xe2x80x9cA low-Voltage CMOS OTA with Rail-to-Rail Differential Input Rangexe2x80x9d, IEEE Trans. Circuit and Systems 1, vol. 47, pp. 1-8, January 2000. As shown schematically, the OTA circuit has extended the linear input range by using in parallel a pOTA circuit 1p composed of a p channel MOSFET and an nOTA circuit 1n composed of an n channel MOSFET. In this circuit, however, which uses a p channel MOSFET and an n channel MOSFET, the matching of the transconductances of transistors of different polarity is required in order to achieve a linear characteristic.
Takai, Watanabe, Takagi, Fujii, xe2x80x9cRail-to-Rail OTA using Transconductance-Parameter-independent OTAxe2x80x9d, ECT-00-94, pp. 73-78, October 2000 has disclosed the configuration in which the transconductance of two input circuits is kept constant by the control voltage generated by using circuits similar to those of the two input circuits, and furthermore, the influence of the operation at the point where the operations of the two input circuits switch is suppressed by using a current selection circuit.
Moreover, Sato, Takagi, Fujii, xe2x80x9cRail-to-Rail OTA using One kind MOSFET""s as VCCSxe2x80x9d, ECT-00-95, pp. 79-84, October 2000 has disclosed the OTA that has combined a pair of MOSFETs and a MOSFET of the same polarity. Since the OTA is composed of MOSFETs of the same polarity, there is no problem about the matching of transconductances.
The object of the present invention is to realize a voltage-to-current conversion circuit composed of MOSFETs of the same polarity, which can realize an OTA with Rail-to-Rail with a simpler configuration.
FIG. 3 is a diagram that shows the basic configuration of the voltage-to-current conversion circuit of the present invention. As shown schematically, the voltage-to-current conversion circuit of the present invention is characterized by comprising a first MOSFET 11, to which a fixed drain-source voltage is applied all the time and which generates a first current signal ID1 for the input voltage, a second MOSFET 12, which has the same polarity as that of the first MOSFET 11, to which the fixed drain-source voltage is applied all the time, and which generates a second current signal ID2 for the input voltage, which is complementary to the first current signal ID1, and a difference current operation circuit 13 that performs the operation to calculate the difference between the first current signal ID1 and the second current signal ID2.
The first MOSFET 11 and the second MOSFET 12 can each be an n channel type or a p channel type as long as they have the same polarity.
There are various modifications for the method to make the first MOSFET 11 and the second MOSFET 12 operate so as to generate current signals complementary to each other. FIG. 4A is a diagram that shows the basic configuration in which the sources of the first MOSFET 11 of n channel type and the second MOSFET 12 of n channel type are grounded and a fixed voltage is applied to each drain, and FIG. 4B is a diagram that shows the voltage-to-current characteristics of the two MOSFETs.
In this basic configuration, the sources of the first MOSFET 11 and the second MOSFET 12 are grounded, respectively, as shown in FIG. 4A, and a voltage VDS is applied to each drain. An input voltage Vin is applied to the gate of the first MOSFET 11. A gate voltage generation circuit 14 generates and applies a voltage 2VT+VDSxe2x88x92Vin to the gate of the second MOSFET 12. Here, VT is the threshold voltage of the MOSFET.
First, the variation characteristic of the current ID1 versus the input voltage Vin of the first MOSFET 11 is described. The operation of the MOSFET can be divided into three regions according to the relationship between a drain-source voltage VDS and a gate-source voltage VGS, as shown in FIG. 4B, and a drain current ID in each region is as follows.
Cutoff region: VGSxe2x89xa6VT
ID=0
Saturation region: VT less than VGS, VGSxe2x88x92VT less than VDS
ID=K (VGSxe2x88x92VT)2 
Non-saturation region: VT less than VGS, VDS less than VGSxe2x88x92VT
ID=2K (VGSxe2x88x92VTxe2x88x92VDS/2) VDS
Therefore, if the gate-source voltage is assumed to be the input voltage Vin, the linear relationship between the input voltage and the drain current holds only in the non-saturation region.
Since the voltage 2VT+VDSxe2x88x92Vin is applied to the gate of the second MOSFET 12 in FIG. 4A, the drain current ID2 changes as shown in FIG. 4B for the input voltage Vin. In other words, the current characteristic is so established that the drain current ID2 and the drain current ID1 are symmetrical with respect to the symmetry axis at which the input voltage is VT+VDS/2. Such a relationship between the first MOSFET 11 and the second MOSFET 12 is referred to as the complementary action to each other here, and ID1 and ID2 are referred to as the currents complementary to each other.
Therefore, the difference current IO, which is obtained by subtracting the drain current ID2 of the second MOSFET 12 from the drain current ID1 of the first MOSFET 11, is as follows in each region.
Region A: Vinxe2x89xa6VT
First MOSFET 11: Cutoff region, ID1=0
Second MOSFET 12: Non-saturation region
ID2=xe2x88x922Kxc2x7VDSxc2x7Vin+K (VDS+2VT) VDS
IO=2Kxc2x7VDSxc2x7Vinxe2x88x92K (VDS+2VT) VDS
Region B: VT less than Vin less than VT+VDS
First MOSFET 11: Saturation region, ID1=K (Vinxe2x88x92VT)2 
Second MOSFET 12: Saturation region
ID2=K (2VT+VDSxe2x88x92Vinxe2x88x92VT)2 
IO=2Kxc2x7VDSxc2x7Vinxe2x88x92K (VDS+2VT) VDS
Region C: VT+VDSxe2x89xa6Vin
First MOSFET 11: Non-saturation region
ID1=2Kxc2x7VDSxc2x7Vinxe2x88x92K (VDS+2VT) VDS
Second MOSFET 12: Cutoff region, ID2=0
IO=2Kxc2x7VDSxc2x7Vinxe2x88x92K (VDS+2VT) VDS
As described above, a voltage-to-current conversion circuit, having a linear input signal range from the grounding potential to the power source voltage, can be realized with a circuit that uses the two n channel MOSFETs shown in FIG. 4A.
In the configuration shown FIG. 4A, the sources of the first MOSFET 11 and the second MOSFET 12 are grounded, respectively, and the voltage VDS is applied to each drain so that the first MOSFET 11 and the second MOSFET 12 are made to operate so as to produce current signals complementary to each other. There are, however, various modifications for the method to make both the first MOSFET 11 and the second MOSFET 12 produce complementary current signals. FIG. 5A and FIG. 5B show examples of those modifications.
In the configuration shown in FIG. 5A, the source of the first MOSFET 11 is grounded and the voltage VDS is applied to the drain, which are the same as the case of the configuration shown in FIG. 4, but the input voltage Vin is applied to the source of the second MOSFET 12, the constant voltage VG, which is equal to VDS+2VT, is applied to the gate, and the voltage VDS+Vin generated in a drain voltage generation circuit 15 is applied to the drain. Therefore, the drain-source voltage becomes VDS. In this case, the operations of the first MOSFET 11 and the second MOSFET 12 can be divided into the following three regions according to the input voltage Vin.
Region A: Vinxe2x89xa6VT
First MOSFET 11: Cutoff region, ID1=0
Second MOSFET 12: Non-saturation region
ID2=xe2x88x922K (Vinxe2x88x92VG/2) (VGxe2x88x922VT)
IO=2Kxc2x7Vin (VGxe2x88x922VT)xe2x88x92Kxc2x7VG (VGxe2x88x922VT)
Region B: VT less than Vin less than VGxe2x88x92VT
First MOSFET 11: Saturation region, ID1=K (Vinxe2x88x92VT)2 
Second MOSFET 12: Saturation region
ID2=K (VGxe2x88x92Vinxe2x88x92VT)2 
IO=2Kxc2x7Vin (VGxe2x88x922VT)xe2x88x92Kxc2x7VG (VGxe2x88x922VT)
Region C: VGxe2x88x92VTxe2x89xa6Vin
First MOSFET 11: Non-saturation region
ID1=2K (Vinxe2x88x92VG) (VGxe2x88x922VT)
Second MOSFET 12: Cutoff region, ID2=0
IO=2Kxc2x7Vin (VGxe2x88x922VT)xe2x88x92Kxc2x7VG (VGxe2x88x922VT)
As described above, a voltage-to-current conversion circuit, having a linear input signal range from the grounding potential to the power source voltage, can be realized with a circuit that uses the two n channel MOSFETs shown in FIG. 5A.
In the configuration shown in FIG. 5A, the constant voltage VG to be applied to the gate of the second MOSFET 12 is generated in the constant voltage source, but another configuration is possible in which VDS+2 VT is generated from the voltage VDS in a gate bias generation circuit 16 and applied to the gate of the second MOSFET 12 as shown in FIG. 5B.
Although the cases where n channel MOSFETs are used have been described above as examples, it is also possible to use p channel MOSFETs in the configuration.
According to the present invention, as described above, attention has been focused on the fact that the difference in the currents that flow in two MOSFETs is linear with the input voltage within the power source voltage range, if the two MOSFETs of the same polarity are so set that the currents that flow in each MOSFET vary symmetrically with respect to a fixed input voltage value, that is, that they operate complementarily. Therefore, operation conditions can be set variously as long as two MOSFETs operate complementarily.